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Rack-scale Computing Made Simple

Think Outside The Box

FabreX universal dynamic fabric enables true rack-scale computing, breaking the constraints of the server box to make the entire rack the unit of compute. That is only feasible with FabreX, because all end points and servers within the rack can finally be connected in native PCIe (and CXL in the future), just as if they were still “inside the box”. No need for another network inside the rack. Now your “server” is the entire rack – but how would you go about deploying a FabreX system to gain the performance, flexibility and agility of true rack-scale computing?

The Basic Building Block: A GigaCell™

The GigaCell is the basic element from which you can build a variety of configurations based on your needs for HPC/AI workloads. Because FabreX connects any to any PCIe end point and servers, you keep your freedom of choice by selecting your preferred server model, instead of being limited to proprietary hardware or a limited list. While some servers will have limitations in terms of the amount of resources their BIOS will recognize, FabreX overcomes these constraints because of its unique ability to network servers together over the same PCIe/CXL fabric, so the resources can easily be shared across several nodes. FabreX will connect any server with any other rack resources into a fabric computing environment where all the resources can be dynamically allocated as if they were inside a single server enclosure.

This example of a GigaCell includes a switch and an Accelerator Pooling Appliance in which you can insert a variety of GPU or FPGA types: they could be all the same accelerators, or for example half compute and half visualization (or inference) GPUs. From FabreX and one of our off-the-shelf orchestration software options, or from our Command Line Interface (CLI) if you prefer writing your own scripts, the pooled resources can be composed to match your specific workload, and recombined if needed in a different configuration for the next workflow. In order to keep your computing cell humming at full speed, this example includes a storage server connected to your data center backbone and network storage.

GigaCell™

The basic GigaCell can be configured in a number of ways depending on your needs, whether more storage, more accelerators, or variety of components. Outfit your JBOGs with the latest GPUs, a mixture of GPUs, FPGAs, ASICs, DPUs, or combine them all together. You get the flexibility and agility of the cloud, but with the security and cost control of your own on-prem infrastructure.

Figure 2, Accelorators

Or create an incredibly powerful compute cell, combining together the power of several HGX-based servers.

Figure 3, Advanced Composition
Advanced Composition Compute Cell

Or create up to 3PB storage cell to create a very large capacity NVMe-oF storage server.

Figure 4, Storage Cell
Storage Cell With up to 3PB

Figure 6, GigaPod

From the GigaCell to the GigaPod™

Simply combine up to 6 cells via FabreX (PCIe / CXL) to create a GigaPod™. All the resources inside the entire GigaPod are connected by the FabreX universal fabric, transforming the entire GigaPod into one unit of compute, where all components communicate over native PCIe (or CXL in future versions) for the lowest possible latency and highest performance.

Figure 7, GigaClusterFrom the GigaPod to the GigaCluster™

With the complexity of AI models doubling every six months, you need the ability to easily expand your training capability as your model complexity grows. For ease of expansion when your AI workflow demands more resources than can be orchestrated in a GigaCell or a GigaPod, simply combine up to six GigaPods to create a GigaCluster™. Your system now extends up to twelve 42U racks, to a maximum of 100 meters on fiber optic cable.

Example of Scale-Out Topology

For maximum scalability of data center resources within a single PCIe/CXL fabric, use typical scale-out topologies such as leaf and spine or dragonfly. The example below shows a novel way for universities to teach advanced artificial intelligence engineering while keeping within their budget, yet at the same time giving their students access to the latest and greatest in terms of infrastructure components.

Figure 8, Full Leaf & Spine Topology for Increased Scale

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Dr. James Cuff

James brings deep insights from the world of advanced computing following over twenty five years working in what he calls “practical supercomputing”. James initially built the computing infrastructure, and supported the teams who annotated the human genome at the Welcome Trust Sanger Institute and the Broad Institute of MIT and Harvard.

Over the last decade, as Assistant Dean & Distinguished Engineer at Harvard, James built an internationally recognized research computing organization from scratch. During his tenure, he was responsible for green high performance computing data centers, peta-scale parallel storage systems, low-latency highly performant networks, and sophisticated fully integrated computing platforms. He led a large team of scientists and research computing experts to support and deliver computing to drive our world’s most complex and advanced scientific research forward.

James joined GigaIO as Chief of Scientific Computing and Partnerships in March of 2022 to further define, build and enhance the scientific strategy for their current, and next generation high performance composable computing platforms and services

James holds a degree in Chemistry from Manchester University and a doctorate in Molecular Biophysics with a focus on neural networks and protein structure prediction from Oxford University.

Marc Lehrer

With previous experience as a GM and VP of Sales at Mellanox Technologies, Marc comes to GigaIO with direct expertise in the high-performance interconnect market. At Mellanox, Marc achieved significant wins in Enterprise and Government HPC clusters. He is an experienced senior sales and business development executive with early stage and public companies, most recently as Senior Sales Director at Netronome Systems, winning high profile customers in the Cloud, Software Defined Networking (SDN) and Network Virtualization (NFV) markets.

Prior to joining Mellanox Marc held senior executive marketing and sales positions in the US and EMEA for Galileo Technology which was acquired by Marvell. Marc was responsible for building and growing the sales organization in EMEA winning many high-profile customers in the telecom and networking markets.

Marc also held senior marketing and product definition positions in the US for Quality semiconductor (later acquired by IDT) and business development in EMEA for Annapurna Labs (acquired by Amazon).

Marc holds an undergraduate degree in Electronic and Electrical Engineering and a postgraduate degree in Electronic and Digital Signal Processing Engineering from Westminster University, London.

Jacqueline Arsivaud

Jacqueline brings twenty years’ experience in marketing and strategic planning with both large companies and tech start-up ventures. At Hewlett-Packard, she managed worldwide product marketing teams launching industry-leading products and programs, and designed and executed highly innovative distribution strategies, including the first channel cooperation program between the direct sales force and the retail channel.

Jacqueline left HP to create an international market research and consulting company focused exclusively on the technology industry.  With offices in San Diego and Berlin, Analytique grew to be ranked in the top 100 research companies in the US by revenue, with a client list including 3Com, Canon, Compaq, IBM, Intel, Hewlett-Packard, and Microsoft among others. She joined GigaIO as Director of Marketing in May 2020 and was promoted to Vice President in August 2021 after leading a major brand repositioning and delivering traction with key industry analysts and strategic partner companies.

Jacqueline first came to the US for a summer session at San Diego State University’s Business School, as part of her MBA program from Institut Supérieur de Gestion in Paris.  She studied Economics and Political Science as an undergrad at France’s Institut d’Études Politiques.

Matt Demas

A seasoned IT executive, Matt brings to GigaIO two decades of experience in sales and solutions architecting. Matt has built federal, healthcare, and education-based vertical solutions at companies like Dell, where he was a Senior Solutions Architect, and Pivot 3, where he led regional sales. Immediately prior to joining GigaIO, he served as Field CTO at Liqid.

Matt spent seven year in IT in the US Air Force and has a deep expertise in Federal IT procurement through his subsequent work as a Senior Consultant with Booz Allen Hamilton, and the partnerships he has built helping systems integrators win Federal contracts.

Matt holds a Bachelor’s degree in Information Technology from American InterContinental University, and an MBA from Concordia University Austin.

Eric Oberhofer

Eric is a seasoned technical sales executive with 20 years of sales and technical management experience in the public and private sectors, and a track record of building and managing world-class sales organizations, and partner development. He has extensive experience in Enterprise IT transformation utilizing next generation data center technologies and management techniques.  His experience spans leadership roles in multiple startups, system integrators, and the US Federal government.

Most recently, Eric served as Vice President, Public Sector at Liqid, a storage and composable solutions provider. Prior to that, he served as Federal CTO and DoD Sales Director at Pivot3, a security infrastructure provider; he was the Managing Director, Consulting at Iron Bow Technologies, a leading systems integrator; and led a global sales team at Dell EMC.

Eric received his Master’s of Science in Management Information Systems from George Washington University and his Bachelor’s of Science in Operations and Information Management from Georgetown University.

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Alan Benjamin

Alan is one of the visionaries behind GigaIO’s innovative solution. He was most recently COO of Pulse Electronics – $800M communication components and subsystem supplier and previously CEO of Excelsus Technologies. Earlier he helped lead PDP, a true start-up, to a successful acquisition by a strategic buyer for $80M in year three. He started his career at Hewlett-Packard in Sales Support and quickly moved into management positions in Product Marketing and R&D. Alan graduated from Duke University with a BSEE in Electrical Engineering and attended Harvard Business School AMP program, as well as UCSD LAMP program.

Joey Maitra

Joey is a 25-year industry veteran, having held executive positions at Magma, Patriot Scientific and Metacomp. Joey has been instrumental in the development of a Unified System Area Network with PCI Express as the fabric and is the inventor of all of the IP associated with it. He has defined the software, hardware and the system architecture of the prototype Switch implementation and has been responsible for the design implementation. Having originated several patents in the areas of communication and image processing, Joey holds a Master’s degree in EE from SUNY and a Bachelor’s degree in Electrical Engineering from Indian Institute of Technology (IIT), India.

Steve Campbell

Steve has held senior VP Marketing positions for HPC and Enterprise vendors. Steve was most recently Vice President of Marketing and Solutions of the Hitachi Server Group. Previously, Steve served as VP of Marketing at Sun Microsystems Enterprise Systems Products Group responsible for the mid-range and high-end Sun Fire and Sun Enterprise servers. He was executive sponsor for several high profile customers in Asia and also responsible for Sun’s High-Performance Computing initiatives and the Data Center Insight Programs leading solution programs for data center consolidation and mainframe migration. Before joining Sun, Steve was a founding partner in a technology consulting company working with early stage technology and Internet start-ups helping raise over $300M. He served on the boards of and as interim CEO/CMO of several early-stage technology companies. Steve was Vice President of Marketing at FPS Computing and held executive positions at Convex.

Robin O’Neill

Robin O’Neill is a computer R&D executive with a history of version 1.0 innovation for companies such as Western Digital, Hewlett Packard, PolyServe (acquired by HP), Intel, the Advanced Computer Research Institute (Lyon, France), Sequent Computer Systems, and The Lawrence Livermore National Laboratory. Most recently, he was head of WDLABS, leading the exploration and incubation of emerging systems, software, and new business opportunities for Western Digital.

His more notable joint contributions include the Computational Flash Storage architecture at Western Digital, the industry’s first fully-symmetric clustered filesystem at PolyServe, the Decoupled-loop Pipelining CPU at the Advanced Computer Research Institute in France, the industry’s first commercial NUMA system and first commercial SMP system at Sequent, the IEEE POSIX standard, and the Unix-based time-sharing supercomputer operating system at LLNL.

Mr. O’Neill holds a Bachelor of Arts degree in Mathematics from the University of Utah.

Niraj Mathur

Niraj has over 20 years of industry experience in strategic and product marketing, product management, business development, customer applications and advanced silicon engineering. He has held senior leadership roles and led global, cross-functional teams to support these disciplines. Niraj was instrumental in driving numerous successful networking products at Nortel Networks, Quake Technologies, AppliedMicro, Snowbush, Gennum, Semtech and Rambus. He has defined, developed and supported carrier grade hardware and software for the world’s leading telecom, enterprise and cloud customers. His past projects include Ethernet PHYs, core Internet switches, metro optical routers, high-speed silicon IPs and PCI Express products. Niraj holds a Bachelor of Computer Engineering from McGill University and an MBA from Cornell University.

Scott Taylor

Scott has an extensive background in high speed networking, accelerators and security from working at companies like Cray Research and Sun Microsystems. Leveraging this background, he created the FabreX software architecture supporting Redfish Composability Service, NVMe-oF, GPU Direct RDMA, accelerators, MPI and TCP/IP all with a single PCI-compliant interconnect. He has built the engineering team at GigaIO from the ground up to implement a singular vision of FabreX as an open source, standards-based ecosystem. Scott’s previous experience includes Prisa Networks, a Fiber Channel startup, where he helped drive the shift from an arbitrated loop to switch based topologies. His many years working as an expert consultant helps him drive key intellectual property development at GigaIO. Scott holds a BS in computer science from UC Santa Barbara.

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